Browse Prior Art Database

Digital Signal Assist Circuitry ( D.S.A.C)

IP.com Disclosure Number: IPCOM000033633D
Original Publication Date: 2004-Dec-20
Included in the Prior Art Database: 2004-Dec-20

Publishing Venue

IBM

Abstract

Poor slew rates on long wires ( global interconnects, word-lines) is a predominant problem in today's integrated circuits. Having good slews improves gate drive, noise immunity and allows for faster circuit operation. Digital Signal Assist Circuitry (DSAC) addresses this problem by incorporating a small footprint circuit which actively improves the slew rate of signals. Existing solutions for poor slews include rebuffering, word-line boosting and hierarchical word-line architecture(s). These existing solutions have draw backs such as increased latency/delay in the signal, increased area/interconnect usage, or complex circuit overhead . DSAC provides a simple solution to poor slew rates in critical circuits.