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Universal Supply Hi-Speed Off-Chip Receivers

IP.com Disclosure Number: IPCOM000034046D
Original Publication Date: 1989-Jan-01
Included in the Prior Art Database: 2005-Jan-26

Publishing Venue

IBM

Related People

Authors:
Beranger, H Brunin, A Johnson, D [+details]

Abstract

A receiver is described which offers the following features: - The receiver is usable with low voltage supply (e.g., 3.4 - .4 V OR 5 V +- .5V). - The receiver threshold is designed for a very low sensitivity to temperature, supply and process (+ - 80 mV overall spread). - The receiver exhibits very short average delay (0.5 ns nominal). The principles of implementation are the following: The circuitry which defines the threshold is common to a bench of receivers and consists of a local reference circuit called here VRG, at 1.05 V for the General-Purpose Interface (GPI) bipolar standard. The receiver itself, depicted in Fig. 1, is basically a current switch circuit, which source of current is also driven from an external voltage reference circuit (called VR3).