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Cost-Effective ALU Multiplier Combination

IP.com Disclosure Number: IPCOM000034151D
Original Publication Date: 1989-Jan-01
Included in the Prior Art Database: 2005-Jan-26

Publishing Venue

IBM

Related People

Authors:
Funk, MR Jacobs, MN Levenstein, SB [+details]

Abstract

This combination, based on a unique set of control hooks, efficiently shares fixed point logic with floating point logic with little overhead cost to either, and provides a necessary boost in floating point performance. The ALU/Shifter in the processor chip is the focus of this process. The processor performs twice as fast as its predecessor in fixed point operations and three to four times as fast in floating point/multiply instructions. Because it is important to fit the floating point/multiply (here- after referred to as scientific) logic in as small a space as possible, this method shares the fixed point logic already on the chip with the scientific logic. Yet the importance of performance forced the development of a novel data flow.