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Low Cost Multiple Hang Timers

IP.com Disclosure Number: IPCOM000034175D
Original Publication Date: 1989-Jan-01
Included in the Prior Art Database: 2005-Jan-27

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Bergey, AL [+details]


"Hang" timers are very useful error-detecting mechanisms. A free- running timer that interrupts a microprocessor or issues a check condition when it is not reset often enough can detect many classes of hardware or microcode failure. Normally, one counter is required to construct each timer. However, this invention builds multiple timers from a single counter. Thus, it performs a traditional function less expensively than the prior art. This mechanism consists of a single counter and two or more three-state finite state machines - one finite state machine for each timer. The counter is free-running. Every time the counter overflows, all the finite state machines move from their present state to the next state (see Fig. 1).