DV/DT Controlled Emitter Follower Driver
Original Publication Date: 1989-Jan-01
Included in the Prior Art Database: 2005-Jan-27
Circuitry has been proposed to control the rise and fall of DV/DT for high current emitter follower drivers in semiconductor devices. Both an inverting and a non-inverting version of the driver have been conceived. (Image Omitted) Both the inverting circuit of Fig. 1 and non-inverting circuit of Fig. 2 receive VTL levels and drive logic levels as follows: logical `1' 2.63 V @ 65 mA; logical `0' 0.15 V @ 0.24 mA. The rising and falling output transitions are controlled to less than 0.6 V/nS for circuit 1 and less than 0.26 V/nS for circuit 2. This is the case when both are driving a 100 cm, 80 ohm transmission line doubly terminated with 82 ohms. The rising transition in circuit 1 is controlled primarily by resistors R1 and R2 and capacitors C1 and C2. The falling transition is controlled by R3 and R4 and C3 and C4.