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Operator Panel DATA Serializer Circuit Disclosure Number: IPCOM000034428D
Original Publication Date: 1989-Feb-01
Included in the Prior Art Database: 2005-Jan-27

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Knepper, LE [+details]


A technique is described whereby an operator panel data serializer circuit provides a means of generating minicomputer data messages, without extensive central processing unit (CPU) overhead and without machine speed dependency. The concept is an improvement designed to increase processing speed. Typically, a minicomputer, such as the IBM System 88, will send messages (commands and data characters) to a sixteen-character display by means of a signal line that doubles as the "serial data" line. The command and data bytes are encoded as an asynchronous 16-bit message unit with the following format: 1 1 1 0 D0 D1 D2 D3 D4 D5 D6 D7 A0 0 1 1 [[[ [[[ [[[[[[[[[[[[[[ [[[[[[[[[[[[[[[ [[ [[ Header Command or Data Byte Trailer where A0 = 1 for data, A0 = 0 for commands.