Programmable Memory Controller
Original Publication Date: 1989-Feb-01
Included in the Prior Art Database: 2005-Jan-27
A technique is described whereby a programmable memory controller (PMC) provides a design support means to rapidly implement high speed dynamic memory devices into computer designs. The PMC provides the design support by enabling a designer to alter processor-memory timing relationships through the use of microcode so that design changes and upgrades to memory circuitry can rapidly be made by simply altering a memory initialization table. During computer product development cycles, faster and denser dynamic random-access memory (RAM) devices become available which have a tendency to obsolete predecessor RAM chips. A designer, using the faster chips, must make extensive design changes, often requiring a new product design cycle, to implement the advanced memory in the memory circuitry.