Browse Prior Art Database

Microprocessor Bus State Monitor System

IP.com Disclosure Number: IPCOM000034447D
Original Publication Date: 1989-Feb-01
Included in the Prior Art Database: 2005-Jan-27

Publishing Venue

IBM

Related People

Authors:
Begun, RM Davila, R Dean, ME Zyvoloski, KM [+details]

Abstract

This article describes a tool for debug and testing of a microprocessor system using a test tool that operates in the I/O channel rather than replacing the system CPU. The bus state monitor system (BSMS) is a tool designed for debug and testing of a microprocessor system. The BSMS is a departure from traditional development systems that are used. Such processor replacement systems require that the processor be replaced by a special module that is attached to the development system and is inserted in place of the processor chip. The BSMS, however, interfaces to the system under test (SUT), through the low end parallel bus (LEPB) I/O channel without replacing the processor. Thus, the final system configuration is tested with a processor installed versus a replacement probe.