Browse Prior Art Database

Logic Circuit to Enhance the Function of an Arithmetic Logic Unit

IP.com Disclosure Number: IPCOM000034467D
Original Publication Date: 1989-Feb-01
Included in the Prior Art Database: 2005-Jan-27

Publishing Venue

IBM

Related People

Authors:
Kocis, TJ [+details]

Abstract

Disclosed is a method to enhance the functionality of a common industry or VLSI macro Arithmetic Logic Unit (ALU) using simple external logic. Common industry and VLSI macro ALUs are designed with a specific set of functions. A designer may want to enhance this function set to increase the overall processor function or performance. This may be accomplished by inserting logic before the ALU as shown in the figure. In this way, the designer may conditionally modify the operation ALU dependent on the "New Carry In" or the "Conditional Inputs". For example, consider an ALU whose set of functions include both "Outputs = A Inputs" and "Outputs = the 2's complement of the A Inputs".