Browse Prior Art Database

Status Bus Structure

IP.com Disclosure Number: IPCOM000034484D
Original Publication Date: 1989-Mar-01
Included in the Prior Art Database: 2005-Jan-27

Publishing Venue

IBM

Related People

Authors:
Arlington, DL Krolak, DJ [+details]

Abstract

A logic sub-structure is shown which utilizes two or more logic modules to perform the interface role between a system bus and memory modules. The function served by the logic modules is to accept and execute commands from a bus which is utilized to transfer data between the system and memory modules. As the commands are being executed, each module monitors the operation, and if an error is detected by any of the modules, a notification action is initiated. An inter-module status communication within the sub-structure and with the system structure is used to halt command execution so that the loss of data or physical damage to the components is minimized. Referring to the figure, each module in the subsystem drives three signal lines, i.e.