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Memory Controller Having Self-Initialize Function Disclosure Number: IPCOM000034531D
Original Publication Date: 1989-Mar-01
Included in the Prior Art Database: 2005-Jan-27

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Related People

Hatori, M Miyazaki, Y [+details]


This article describes a concept of providing a self-initialize function in a memory controller. This controller is set up with memory information, such as memory access speed, memory address, controller I/O address, using CPU start-up time. The memory system with this controller needs no CPU initialization. Three major components are provided in the controller, which are four programmable register units, a set-up sequencer and a memory. A part of the memory contains information about this memory system. The information is on memory size (range in address space), memory base address, I/O address for memory bank switch and memory wait. After a power-on reset, the set-up sequencer reads this memory information from the memory and sets the values to the corresponding registers.