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Asynchronous Parallel Data Transfer Interface Technique

IP.com Disclosure Number: IPCOM000034654D
Original Publication Date: 1989-Mar-01
Included in the Prior Art Database: 2005-Jan-27

Publishing Venue

IBM

Related People

Authors:
Westcott, GR [+details]

Abstract

Data can be transferred asynchronously from a host data processing system to an output device on a simplified demand/response parallel interface without clocking signals and using parallel data transfer with only a few control and status signals. An arrangement of the interface controls between host system 1 and output device 2, such as a printer, is shown in Fig. 1. Asynchronous Data Interface Controls 3 generate the data request to the host through Interface Drivers and Receivers 4 and requests direct memory access (DMA) through block 5 to microprocessor unit (MPU) 6. Host data are (Image Omitted) then transferred under DMA control to memory 7. Output device 2 then accesses memory 7. The Asynchronous Data Interface Controls 3 also decode special characters, such as paper handling codes, that terminate data transfer.