"Pseudo Static" Physical Modeling of Dynamic Hardware Devices
Original Publication Date: 1989-Apr-01
Included in the Prior Art Database: 2005-Jan-27
Disclosed is a procedure for modeling dynamic hardware as a static model for electronic logic design simulation. Dynamic hardware is identified by its change of state when input changes do not occur at some minimum frequency, the most familiar example being "dynamic random-access memory" (DRAM) devices. The stored information will be lost if the refresh signal does not periodically stimulate the devices. Most microprocessors are dynamic, also, usually identified by their minimum clock frequency specification. Since these microprocessors and memories are so prevalent in electronic designs today, problems with modeling dynamic hardware are prevalent.