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Dual Port Input/Output System Processor With a Fast Path for Input/Output Attachments Disclosure Number: IPCOM000034795D
Original Publication Date: 1989-Apr-01
Included in the Prior Art Database: 2005-Jan-27

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Chisholm, DR Kouloheris, JL [+details]


A technique is described whereby a dual port communications input/output (I/O) system processor provides a "Fast Path" operational architecture. The "Fast Path" enables an alternate random access storage communications path to accommodate a variety of subsystem I/O bus attachments. A typical I/O attachment connects to subsystem I/O bus 10, as shown in Fig. 1, within an I/O subsystem. Device interface control 11 and device drivers/receivers 12 are unique to a particular subsystem I/O bus attachment and random-access memory (RAM) data buffer 13 and RAM control unit 14 are not present on all attachments, but are required for "Fast Path" operation. The implementation of the "Fast Path" concept is shown in Fig.