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Interface Adapter Communication Bus

IP.com Disclosure Number: IPCOM000034797D
Original Publication Date: 1989-Apr-01
Included in the Prior Art Database: 2005-Jan-27

Publishing Venue

IBM

Related People

Authors:
Padgett, RS Reiland, RE [+details]

Abstract

A technique is described whereby an interface adapter bus provides bidirectional interconnection for multiplexed subsystems. The concept provides synchronous and asynchronous capability in accordance with the IEEE-488 standard. (Image Omitted) In prior art, communications processors typically require multiple ports and circuit slots to accommodate the required communications channels. This quickly fills up the available slot positions, requiring expansion units to be added. The concept described herein implements an interface adapter (IA) bus whereby the subsystem I/O bus is multiplexed and the signal lines are arranged in such a way so as to reduce the requirement for an expansion assembly.