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High Performance Analog/Digital Mixed Mode Simulation Disclosure Number: IPCOM000034851D
Original Publication Date: 1989-Apr-01
Included in the Prior Art Database: 2005-Jan-27

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Bull, M [+details]


Disclosed is an algorithm for implementing analog/digital mixed mode simulation while maintaining the high performance of a digital simulator. A number of analog/digital mixed mode simulators are in existence today. They have approached the problem from the aspect of modifying an analog simulator to incorporate the ability to simulate digital logic nets. As a consequence they pay the high price of the CPU intensive complex computations of an analog simulator. This greatly limits the size of designs which can be simulated on them. In many instances, the design to be simulated consists mostly of digital logic connected to a relatively small amount of analog circuitry. Furthermore, this analog circuitry often represents the detailed implementation of a limited set of semi-generic building blocks.