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Chip Temperature Leveling of Multi-Chip Modules After Encapsulation

IP.com Disclosure Number: IPCOM000034873D
Original Publication Date: 1989-May-01
Included in the Prior Art Database: 2005-Jan-27

Publishing Venue

IBM

Related People

Authors:
Edwards, DL Zumbrunnen, ML [+details]

Abstract

Junction temperatures of semiconductor chips in a multi-chip module are controlled, and maintained within thermal specification, by adjusting the thermal resistances of the module after encapsulation. Typical high-performance cooling approaches integrate the cold plate and TCM hat into a single part. As a consequence of manufacturing tolerances on the chip and on the cooling hardware, the range of chip temperatures is very difficult to control without knowing the actual power dissipations and physical dimensions of the parts. The thermal consequences of these "actual" quantities are known only after the module is encapsulated with its cooling hardware.