Browse Prior Art Database

Modeling Line Card Loading on a Bus

IP.com Disclosure Number: IPCOM000035029D
Original Publication Date: 1989-May-01
Included in the Prior Art Database: 2005-Jan-28

Publishing Venue

IBM

Related People

Authors:
Downey, JH [+details]

Abstract

A technique is described which allows the circuit analysis program (ASTAP) to insert and remove line card models from the TDM Shelf Bus during a Monte Carlo analysis. This results in an automatic and random loading on the bus. The bus contains 24 slots. Any type of line card can be inserted into any one of the slots. Each type of line card has an unique interface impedance. A problem arises when trying to model the random loading on the bus. Assume the interface impedance of N-1 line cards have been modeled. There are N total models when an empty slot modeled as infinite impedance is included. The N unique models are connected to each slot via N resistors, as shown in the figure. Zi represents the impedance of the ith model. The resistor Ri connects the ith model to the slot.