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TEST LOGIC for Error Checkers

IP.com Disclosure Number: IPCOM000035033D
Original Publication Date: 1989-May-01
Included in the Prior Art Database: 2005-Jan-28

Publishing Venue

IBM

Related People

Authors:
Beacom, TJ Brown, JD [+details]

Abstract

The TEST LOGIC is a device which injects an error into digital logic hardware, under the control of a diagnostic program. The purpose of this is to verify that the error detecting and reporting mechanisms of the associated computer are working properly. Error checking logic in a computer could fail such that false errors are reported all the time. This is easily detected by diagnostic programs during the IPL of the machine. The error-checking logic could also fail in such a way that true errors are not detected. The problem addressed by the TEST LOGIC is to detect this second mode of failure. It is desirable to check that all of the logic in a computer functions properly during the IPL sequence, i.e., before the machine starts (Image Omitted) to do work for the customer.