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Structured 64-Bit Leading Zero Encoder

IP.com Disclosure Number: IPCOM000035056D
Original Publication Date: 1989-May-01
Included in the Prior Art Database: 2005-Jan-28

Publishing Venue

IBM

Related People

Authors:
Desrosiers, B Steimle, A [+details]

Abstract

The principle of this circuit lies on the separation of the 64-bit number into 8 groups of 8 bits each. As shown on the joined schematic, the counting of the leading zero (LZ) in each group is performed in the upper half page and, the counting of the number of groups at zero is performed in the lower half page. The structure used for the groups is exactly the same as the structure used for the bits in a group. The group of NOR gates operates as follows: - The first left column counts the number of leading zeros in group 7. If there are between 0 and 7 leading zeros, only the NOR output corresponding to the number of LZs would be active (output 70 to 77). - The other columns count the leading zeros in group 0 to group 6 in the same manner.