Browse Prior Art Database

"Special Case" Arithmetic Handling for IEEE Floating Point Hardware

IP.com Disclosure Number: IPCOM000035061D
Original Publication Date: 1989-May-01
Included in the Prior Art Database: 2005-Jan-28

Publishing Venue

IBM

Related People

Authors:
Brown, JD [+details]

Abstract

A hardware implementation of the IEEE floating point specification must be able to handle all numeric types defined in the standard. The algorithms used to calculate numeric results fail on many of the numeric types. The presence of these "special case numbers" are detected and the correct result is generated for each case. A floating point processor has a number of sequencers that control the arithmetic processing. Each sequencer is designed specifically for a particular arithmetic function. For example, the multiply sequencer (MLTSEQ) handles all control aspects of the multiply calculation. There is one additional arithmetic sequencer referred to as the Special Case Sequencer. Its job is to process all occurrences of operand pairs where one or both of the operands is not a +/- real number.