Browse Prior Art Database

Dynamic Pneucs for Chips

IP.com Disclosure Number: IPCOM000035064D
Original Publication Date: 1989-May-01
Included in the Prior Art Database: 2005-Jan-28

Publishing Venue

IBM

Related People

Authors:
Merkel, DA [+details]

Abstract

Gate array (GA) chip images and standard cell (SC) chip images each have their own advantages. GA chip images have shorter manufacturing turn-around time (TAT), and SC chip designs can contain a large variety of high density circuits. This proposal is an attempt to develop a methodology to create chip images that contain all of the advantages of both GA and SC chips. As chip densities increase, the ability to put a varied collection of macros on a chip make SC chips more attractive. At the same time, manufacturing schedules are such that GA chips should be used. This proposal suggests a methodology that future chip technology development should consider to gain the advantages of both SC and GA chip approaches. Fig. 1 shows the varied configurations of chips that system designers will require.