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Disclosed here are two circuits which increase the delay time of a delay chain as a fuse(s) is blown by laser or other means, which can be implemented for VLSI chips.
English (United States)
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New Delay-Time Tunable Design With Laser-Blown Fuses
Disclosed here are two circuits which increase the delay time of a delay
chain as a fuse(s) is blown by laser or other means, which can be implemented
for VLSI chips.
On-chip time delay finds many applications in VLSI circuit. In
these applications, an accurate estimation of delay time is essential
because too fast or slow delay would cause glitches, lack of sense
signals, or slower performance. However, an accurate estimation of
delay time is difficult and an adjustable delay chain is needed. The
following circuits are implementations of adjustable delay chains,
the delay of which increase as fuses are blown. The circuits are
useful in the design phase as well as production phase of a chip in
contrast to the adjustable delay chain reported earlier [*].
In Fig. 1, the initial delay of the delay chain is zero. As we blow the fuses F1
and F1B, QN1 turns on and the input is delayed by two inverters I11 and I12. If
we blow F2 and F2B, the input is delayed by four (4) inverters. Blowing F3 and
F3B gives eight inverter delays. Combination of suitable blown fuses gives a
delay between two to 16 inverter delays. Any number of delay chains can be
connected in tandem. Including binary weighted number of inverters in each
stage gives added flexibility but is not absolutely necessary.
In Fig. 2, the input is delayed by two different amounts and then applied to
the NAND gate. With the fuse intact, the faster...