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Disclosed are thin film transistor (TFT) structures with low resistance contacts which are prepared by selective tungsten deposition technology.
English (United States)
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Thin Film Transistors With Low Contact Resistance Prepared by Selective
Tungsten Deposition Technology
Disclosed are thin film transistor (TFT) structures with low resistance
contacts which are prepared by selective tungsten deposition technology.
TFT structures comprise a substrate 10 bearing a gate 12, a first dielectric
layer 14 over the gate, and a device active layer 16 over the first dielectric layer
(Figs. 1-3). A source and a drain are formed by two separate regions 18 and 20
of an N+ contact layer on the device active layer. A second dielectric layer 22
insulates the source and drain from each other.
Ohmic contacts are formed by providing a layer 24 of tungsten on the N+
contact layer. An interconnection layer 26 is provided over the tungsten layer.
Tungsten can be deposited on the N+ amorphous or polycrystalline silicon
contact layer either before or after the source/drain area is defined. For example,
tungsten layer 24 can be formed on the blank Nlayer first, and the source/drain
connection area can subsequently be defined (Figs. 1 and 2). Alternatively, the
blank N+ layer can be deposited, the source/drain connection area can be
defined, and the selective tungsten reaction can be carried out afterward (Fig. 3).
There are two major advantages of using the selective tungsten technology in
preparing TFT contacts. First, the tungsten deposition process involves a silicon
displacement reaction at an early stage of the process, which gives a...