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Low Mis-Match DAC Configuration for Selectively Offsettable Current-Controlled Circuitry

IP.com Disclosure Number: IPCOM000035555D
Publication Date: 2005-Jan-24

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a receiver architecture that employs a single digital to analog converter (DAC) for multiple analog front end (AFE) slices to avoid mismatch that would otherwise be encountered by an architecture that uses multiple DACs. Here, a single 8 bit multi-output DAC provides dedicated threshold setting currents to each of the 14 AFE slices. The architecture also employs push-pull differential outputs that can be selectively applied to modify an effective threshold of any of the 14 AFE slices.