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Microprocessor-Based Power Control Subsystem Acting As a Service Processor Back-Up and Controlling Distributed Power Blocks

IP.com Disclosure Number: IPCOM000035758D
Original Publication Date: 1989-Aug-01
Included in the Prior Art Database: 2005-Jan-28

Publishing Venue

IBM

Related People

Authors:
Abbes, G Lamboley, E Roman, T Vachee, P [+details]

Abstract

This article describes the hardware and the architecture of an intelligent power control subsystem used by a communication Controller which is availability and reliability oriented. This subsystem is microprocessor-based and has its specific microcode. Part of this hardware is never powered off and must work in natural convection to perform the scheduled power on, the automatic restart and the vital customer configuration data storage. It has responsibility for: the reporting to the communication controller service processor of all faults of any power blocks and the memorization of up to 8 faults in case the Service Processor is DOWN, the individual powering ON/OFF of each power block, and communication with a control panel. (Image Omitted)