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Simultaneous Definition of Two or More Patterns With One Multilevel Mask Structure

IP.com Disclosure Number: IPCOM000035810D
Original Publication Date: 1989-Aug-01
Included in the Prior Art Database: 2005-Jan-28

Publishing Venue

IBM

Related People

Authors:
Cote, WJ Cronin, JE Holland, KL Holland, SP Kaanta, CW [+details]

Abstract

A technique for simultaneous definition of two metal levels in the fabrication of a semiconductor is shown that will produce a wiring level with a self-aligned stud level with one exposure.