Browse Prior Art Database

Timing Verification for Macros With Usage Dependent Constraints

IP.com Disclosure Number: IPCOM000035819D
Original Publication Date: 1989-Aug-01
Included in the Prior Art Database: 2005-Jan-28

Publishing Venue

IBM

Related People

Authors:
Elder, WH Hedberg, MP [+details]

Abstract

An algorithm is shown that allows timing verification of a single physical VLSI macro that has multiple logical applications on a chip.