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The functional sort testing signature method described in this article provides an effective means of functional sort testing populated cards by utilizing a data compression technique.
English (United States)
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Card Functional Sort Testing Signature Method
The functional sort testing signature method described in this article provides
an effective means of functional sort testing populated cards by utilizing a data
The implementation of this technique requires a PC AT, a processor
emulator, the functional self-test acquisition and data compression chip (FSTC),
the board under test (BUT), a defect-free board, and the RAS code for the BUT.
The PC AT interfaces with the emulator and the FSTC to control the
execution of the RAS code and the subsequent collection of signatures produced
by the BUT signal data via the FSTC. The RAS code is run on the defect-free
board and signatures are collected on each test net. The signatures are then
stored for later comparisons.
The RAS code is run on a BUT and signatures are collected on each of the
test nets. These signatures are compared with the defect-free board's
signatures. If the signatures match, the BUT passes this test. If the signatures
do not match, the BUT fails this test.
The processor emulator can be instructed to START, STOP, or CONTINUE
the execution of the RAS code. Therefore, the RAS code can be run in many
short segments and signatures can be taken during these time intervals. This
enables an iterative means of isolation to the first failing section of code and,
therefore, the first failing net.
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