Browse Prior Art Database

Acquisition Sequencer Subsystem for the Functional Self-Test Chip Prototype

IP.com Disclosure Number: IPCOM000035854D
Original Publication Date: 1989-Aug-01
Included in the Prior Art Database: 2005-Jan-28

Publishing Venue

IBM

Related People

Authors:
Chan, GK O'Dell, JT Shorter-Beauchamp, JA [+details]

Abstract

The control system described in this article allows the functional self-test chip prototype to acquire data synchronously to the board under test's (BUT's) clock even when the input/output clock at the FSTC communications interface is not synchronous to the BUT's system clock.