High-Performance Vertical Npn With Soi Lateral Pnp
Original Publication Date: 1989-Aug-01
Included in the Prior Art Database: 2005-Jan-28
Disclosed is a novel approach for integrating a high-performance lateral pnp with a high-performance "double-poly" vertical npn for complementary bipolar circuit applications. The high-performance lateral pnp device is achieved through a buried oxide layer underneath the lateral pnp to reduce parasitic capacitance and base charge storage.