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This article describes a technique which allows interrupts from a personal computer (PC) keyboard to occur but still guards the mouse basic input-output system (BIOS) critical section.
English (United States)
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Mouse Critical Region Resolution
This article describes a technique which allows interrupts from a personal
computer (PC) keyboard to occur but still guards the mouse basic input-output
system (BIOS) critical section.
In some PC systems the keyboard and mouse are controlled by a single
peripheral chip. This chip is a universal peripheral interface (UPI) which acts as
a micro-computer. The UPI accepts commands as well as performing the serial
interface protocol to the keyboard and the mouse.
To preserve a level of compatibility with existing PCs, the UPI directs single
data bytes written to its data port to the keyboard. In order to send
data/commands to the mouse a two-byte sequence is required. The first byte,
written to the UPI's command port, informs the UPI that the host wishes to
transmit to the mouse. Upon acceptance of this command, the UPI waits for the
next host write to its data port. When this occurs it takes that byte and transmits
it to the mouse. This two-byte sequence is a critical section. The data/
command byte sent to the UPI and intended for the mouse must be immediately
preceded by the command to the UPI to do so. Hence, the mouse BIOS guards
its critical section by disabling interrupts from the time of the command output up
till and including the data output. However, since keyboard inputs are
asynchronous to the command output, there exists a window of time where an
interrupt may be pending from this device that does not get serviced properl...