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This article discloses the use of capacitors as interlevel connectors (interconnection jumpers) for power supply distribution on semiconductor chip packages.
English (United States)
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Capacitor As an Interconnection Jumper Between Power Supply Busses
This article discloses the use of capacitors as interlevel connectors
(interconnection jumpers) for power supply distribution on semiconductor chip
Thin film CMOS chip packaging designs, requiring only two power levels (5
volts and ground), frequently employ two power busses that span across the chip
carrier from one end to the next. As illustrated in Fig. 1A, these power supply
busses (5 V 1 and ground 2), criss-cross the substrate 3 in an orthogonal
manner, both busses running parallel to each other. Since power supply busses
1 and 2 are nothing more than metal lines on the substrate surface, it is not
possible to have them cross on a common point on that surface without shorting
one power supply to the other. This is ordinarily avoided by having each power
bus occupy a different metallization level, the buried layer being connected to
appropriate surface pads by via holes through an insulating layer.
A blow-up of the cross-over structure is shown in Fig. 1B, in which capacitor
chip 4 occupies the intersection of power busses 1 and 2, allowing the metal
plate 5 of each capacitor sector to act as a jumper to bypass the other power bus
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