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Thermal Reflow of Patterned Resist Without Via Shifting Disclosure Number: IPCOM000036132D
Original Publication Date: 1989-Sep-01
Included in the Prior Art Database: 2005-Jan-28
Document File: 4 page(s) / 107K

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Feeley, JD: AUTHOR [+3]


This article describes a novel process that minimizes image shifting and via size reduction during thermal reflow. (Image Omitted)

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Thermal Reflow of Patterned Resist Without Via Shifting

This article describes a novel process that minimizes image shifting and via size reduction during thermal reflow.

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The great majority of photo-lithographic systems used to expose 1.2 um and smaller feature sizes produce near vertical to vertical resist wall profiles. For most applications this is desirable; however, when dry etching tapered contact vias, the vertical resist wall profile is replicated in the passivation material. Tapered contact vias are necessary for good metal continuity and step coverage.

Many dry etching processes use isotropic resist erosion in conjunction with high O2 concentrations to create a taper in the underlying passivation layer material. For many applications, the O2 consumes far too much resist and produces only marginally tapered contact vias. Another method used to obtain tapered vias has been to thermally reflow the patterned resist wall. While this solution works well for large vias, 1.5 um or larger, thermal reflow processes have severe problems for smaller vias over severe topography as the vias tend to reflow shut or shift. In a CMOS 1.0 um technology, for example, 1.2 um nitride vias which are in close proximity to large vias (greater than 10 u) will shift to the extent that less than 25% of the via covers the first level metal after thermal treatment of the patterned resist film. This shift has been observed at temperatures as low as 95oC for a positive photoresist.

Via shifting is caused by several forces. One of these forces is the non- uniform surface tension created by proximity effects which initially shift the via, but not usually enough to significantly change the percentage of via coverage over the M1 wire. When the patterned resist film is heated, however, further imbalance of the surface forces occur as the resist becomes more conformal to the topography below it (i.e., the resist moves in the direction of the lowest areas) and as

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the solvent is removed from the resist. This is why the degree of via shift is not only a function of proximity effects but also the severity of the underlying topography. See Figs. 1-3. Vias that reflow shut or are significantly reduced in size do so primarily for the same reasons stated above but also because of their proximity to a wire (see Fig. 4) and because of residual resist which has a higher probability of happening in small vias.

The following process that allows thermal reflow of patterned resist walls but minimizes or eliminates the associated image shifting and via size reduction is proposed.

First, the wafer with its underlying topography is coated with resist to approximately 1.0 um thick using TNS or equivalent resi...