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Simultaneous Contact/Planarization Etch Process

IP.com Disclosure Number: IPCOM000036139D
Original Publication Date: 1989-Sep-01
Included in the Prior Art Database: 2005-Jan-28

Publishing Venue

IBM

Related People

Authors:
Pickens, MW Stanasolovich, D Theisen, JF [+details]

Abstract

Currently, in semiconductor processing that requires planar passivation layers, planarization and contact etch are carried out in separate processing. The passivation layer is first planarized using one of the commonly available techniques, i.e., polishing or planarizing coatings and subsequent etch. This process is then followed by the contact definition process, which consists of a complete photo and etch process. (Image Omitted)