Folded Trench Capacitor CMOS Cell
Original Publication Date: 1989-Sep-01
Included in the Prior Art Database: 2005-Jan-28
A technique is described whereby an ultra-thin folded trench capacitor CMOS cell is constructed utilizing improved selective epitaxy techniques. Described is a means of fabricating small size CMOS cells, with trench capacitor, that is operational in ultra large-scale integrated (ULSI) circuits.