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Three-Dimensional Semiconductor Device Structures Using Channelled Ion Implantation and Annealing Techniques

IP.com Disclosure Number: IPCOM000036208D
Original Publication Date: 1989-Sep-01
Included in the Prior Art Database: 2005-Jan-28

Publishing Venue

IBM

Related People

Authors:
Rutz, RF Sadana, DK [+details]

Abstract

A technique is described whereby three-dimensional semiconductor device structures are produced using channelled ion implantation and annealing methods. The concept concentrates on producing a very shallow conducting layer with an abrupt boundary, for improved MESFET and other semiconductor devices, and simultaneously buries conducting or insulating layers.