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Shared Memory Arbiter Circuit

IP.com Disclosure Number: IPCOM000036213D
Original Publication Date: 1989-Sep-01
Included in the Prior Art Database: 2005-Jan-28

Publishing Venue

IBM

Related People

Authors:
Frey, DE Podolak, MM [+details]

Abstract

An inexpensive arbiter circuit permits either a printer communication adapter or microprocessor to communicate with shared random-access memory (RAM) on a first come-first-served basis, but limits the access of each to one memory cycle if the other is waiting, and prevents bus contention or race conditions. (Image Omitted)