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Configuration Register and Protection Mechanism

IP.com Disclosure Number: IPCOM000036232D
Original Publication Date: 1989-Sep-01
Included in the Prior Art Database: 2005-Jan-28

Publishing Venue

IBM

Related People

Authors:
Leininger, JC [+details]

Abstract

This article describes a circuit arrangement which utilizes a latch that is set at power-on time with power-on reset to prevent erroneous microcode changes to the contents of a configuration register.