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Memory Architecture Supporting Two 8-Bit/Pel Images or One 16-Bit/Pel Image Disclosure Number: IPCOM000036315D
Original Publication Date: 1989-Sep-01
Included in the Prior Art Database: 2005-Jan-28

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Flurry, GA Muhich, JS Wilson, JL West, LP [+details]


The architecture disclosed herein provides a selectable logical memory width so that the memory space can be used to store a single 16-bit/ pel image, or the memory array can be effectively split into two portions to allow storage of two separate 8-bit/pel images. The architecture also provides a secondary serial video port to allow easy access to the scanline pel data from either of the two 8-bit images or from the 16-bit image. (Image Omitted)