Fast General-Purpose State Machine
Original Publication Date: 1989-Sep-01
Included in the Prior Art Database: 2005-Jan-28
This disclosure describes a scheme which simplifies channel interface state rules and translates them into tabular form. All information is inferred only from the rules, in particular, tag polarity, significance and priority. Tags are all handled and tested in parallel by table look-up suitable for RISC architecture. A fast compact solution resulted. Alternatives would require either special hardware such as PLA or more code space.