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Disclosed is a front-end system interface for a high speed serial link. This high speed serial link will provide data communication between processors and other processors or high speed I/O devices.
English (United States)
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System Bus Interface for 300-Megabit Serial Channel
Disclosed is a front-end system interface for a high speed serial link. This
high speed serial link will provide data communication between processors and
other processors or high speed I/O devices.
The serial link is attached to the processor complex via an 8- byte-wide data
bus. Address and data are multiplexed on this bus for I/O instructions and DMA
operations. The major components are shown in the figure. The bus controller is
a state machine that handles the bus protocol and responds to the addresses
issued by the processor. The processor will communicate via load/store
commands to set up the link for operation. The bus controller also handles
interrupts that the serial link generates. The DMA controller is coupled with the
transmit/receive logic to manage block data transfers between the data buffers
and system memory when the link is operational. The multi-port register file is
used to store the I/O registers that define channel operation and, also, 16 tags
used by the DMA controller.
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