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A method is described which provides for a common data set that will be used in documenting the design as well as generating the testcases for verifying the logic operations.
English (United States)
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Logic Testcase and Documentation Generation
A method is described which provides for a common data set that will be
used in documenting the design as well as generating the testcases for verifying
the logic operations.
Two programs are described that are used against a common data set to
generate both the testcase for verifying the logic operation and a set of timing
diagrams that document the logic operation.
One problem with logic design is that the documentation of the logic is always
behind the actual state of the logic implementation. To solve this problem, a
common data set is needed. In this method this data set is a timing diagram.
From these timing diagrams of the logic operation one program is used to
generate a testcase that is used by the functional simulator to verify the logic
operation. Another program uses the same set of timing diagrams to generate an
include file for the engineering note book that shows the timing relationships of
the logic and thus documents its operation.
Thus by creating the timing diagrams to simulate the logic, the designer is
also creating his documentation at the same time. The obvious benefit from this
approach is that the documentation matches the operation of the logic exactly
since the same data set that is used to create the documentation is used to
create the testcase for logic verification. A pictorial representation of this flow is
shown in the figure.