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Browse Prior Art Database

Reconfigurable Current State Array for a Hardware Simulation Accelerator

IP.com Disclosure Number: IPCOM000036368D
Original Publication Date: 1989-Sep-01
Included in the Prior Art Database: 2005-Jan-29

Publishing Venue

IBM

Related People

Authors:
Montoye, RK Sweet, MD Wright, CG [+details]

Abstract

This invention provides a way to trade off model size against run speed in a simulation engine. The simulation engine described performs a hardware evaluation of a four-input gate. The concept can be extended to gate with any number of inputs.