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An Input/Output Channel Controller (IOCC) interrupt subsystem runs asynchronously to the system clock, but its control registers and data-path must be read and written by the system processor.
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Method for Performing PIO to the IOCC Interrupt Control Registers
An Input/Output Channel Controller (IOCC) interrupt subsystem runs
asynchronously to the system clock, but its control registers and data-path must
be read and written by the system processor.
The interrupt subsystem described here is a VLSI implementation that is
clocked asynchronously with respect to the system clock to minimize latency in
sampling and processing external interrupts. After the external interrupts are
sampled in the chip, a vector look- up is performed, and the interrupt controller
provides data-path control pulses and a request signal to the system bus
The interrupt controller is closely coupled to the system interface so that in an
environment with multiple interrupt requests, interrupts are placed on the system
bus as quickly as possible.
The access method described here adds a Programmed Input/Output (PIO)
interface controller, and a handshaking protocol, used to suspend interrupt
processing until the PIO cycle is complete.
Fig. 1 and Fig. 2, respectively, describe the data-path and con
trol relationships of the interrupt subsystem and the PIO interface controller.
The PIO handler runs synchronously with the system clock and
asynchronously with the interrupt controller. When a PIO operation to the
interrupt subsystem address space is detected by the interface controller, a
signal is sent to the interrupt controller to suspend interrupt processing, an...