Data Security Through Dynamic Buffer Clearing
Original Publication Date: 1989-Oct-01
Included in the Prior Art Database: 2005-Jan-29
Problem definition: An I/O Channel Controller (IOCC) implementation contains buffers which hold data during transfers between the system bus and system memory. The I/O architecture allows multiple first party DMA masters on the I/O bus to access these shared IOCC buffers. This means that two first party masters can use the same IOCC buffer when transferring data. However, one of these two masters must not be allowed to access data belonging to the other, or data security is compromised. There are many ways to provide data access security, but most of the obvious and classical approaches require either increased latency in the data transfers or more complex control hardware.