Browse Prior Art Database

RMU Mask Generation From Shift Amount or Pad/Start/End Specifications

IP.com Disclosure Number: IPCOM000036715D
Original Publication Date: 1989-Oct-01
Included in the Prior Art Database: 2005-Jan-29

Publishing Venue

IBM

Related People

Authors:
Huffman, AE [+details]

Abstract

Having a general-purpose rotate and merge unit (RMU) in a processor can save logic. A general-purpose RMU can perform such functions as shifting, data alignment for storage, or data moving or insertion. The most difficult part of adapting a shift to an RMU is generating the mask to be used for the merge. This invention is a method of generating that mask from the shift amount for a shift function or from a pad bit, start bit position and end bit position specification of an RMU mask found in instructions of some architectures. This mask generation makes efficient use of circuits and does not significantly impact the timing of the rotate and merge logic.