Error Detection/Reconfiguration in Fault-Tolerant Communication Subsystem
Original Publication Date: 1989-Oct-01
Included in the Prior Art Database: 2005-Jan-29
A method is described for detecting, in a Communication System architecture with distributed microprocessors and shared memory, the fault of a given microprocessor by all the others. The shared storage is structured in pairs of banks. Also described is how to guarantee that all the microprocessors use the same side of a pair of banks in case of bank fault or bank access path fault.