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ECL to Bi-Cmos Level Converter With ECL Amplifier

IP.com Disclosure Number: IPCOM000036753D
Original Publication Date: 1989-Oct-01
Included in the Prior Art Database: 2005-Jan-29

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Boudon, G Maillart, E Wallart, F [+details]


With VLSI improvements, the density of circuit per chip increases, but this integration is limited by the power dissipation allowed by the packaging in the case of an ECL (emitter-coupled logic) type of circuit. This article describes an interface circuit which permits merging on the same chip islands of logic with ECL circuits (low swing signal) with islands of Bi-CMOS circuits. Prior art reports the use of PFETs connected in a differential pair to perform the shifting and the amplification of the ECL signal. This kind of circuit suffers from the relative poor performance of the PFETs which are usually slow circuits (input ECL voltage swing and threshold voltage sensitivity).