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This article describes a mechanism for efficient slot allocation on a synchronous time division multiplexed (STDM) bus as a function of the input demand for bandwidth.
English (United States)
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Page 1 of 3
Bandwidth Management of Statistical Time Division Multiplexing Via Buffer
This article describes a mechanism for efficient slot allocation on a
synchronous time division multiplexed (STDM) bus as a function of the input
demand for bandwidth.
The mechanism disclosed herein includes a statistical time division multiplex
bus with multiple nodes vying for time slots, a bus
arbiter with the task of allocating bus bandwidth and input nodes with buffer
queues to hold incoming data until placed on the bus for delivery to other nodes.
Fig. 1 is a diagrammatic illustration of a peer bus and arbitration bus.
A set of polling tag lines are provided between each node and the arbiter.
Further, each node is connected to a four-bit bus for reporting buffer queue
status to the arbiter each time it receives a poll tag signal from the arbiter. Each
buffer queue has sufficient size to retain n slots worth of data and destination
address. When reporting buffer queue status, the node encodes the buffer
contents in terms of the equivalent number of slots it contains.
A frame on the STDM bus contains enough slots to empty some
predetermined percentage of the total nodal buffer queue maximum capac
ity. The arbiter assigns the slots for frames following the poll to each node in
proportion to their demand. Each node in turn has separate input buffers for
each port on the node and scans them in sequence and transfers their data in